Various embodiments disclosed herein relate to nonvolatile memory devices, and more particularly, to a charge trap type of nonvolatile memory devices.
Generally, nonvolatile memory devices can electrically erase and program data and can retain their stored data even when their power supplies are interrupted. Thus, nonvolatile memory devices are used in various fields.
Nonvolatile memory devices may be classified into floating gate type of nonvolatile memory devices and a charge trap type of nonvolatile memory devices according to a kind of a memory storage layer constituting a unit cell. A charge trap type of nonvolatile memory devices can realize low power, low voltage and/or high integration.
A charge trap type of a nonvolatile memory device includes a charge trapping layer for injecting and storing charges, a charge tunneling layer and a charge blocking layer. Storing charges in the trapping layer can be performed using a difference of an energy band gap on each layer.
Also, a charge trap type of a nonvolatile memory device can be classified into a single level cell (SLC) storing one bit in one cell and a multi level cell (MLC) storing a plurality of bits in one cell.